1. Field of the Invention
This invention relates to FET memory cells and more particularly to flash memory cells.
2. Description of Related Art
A conventional FLASH memory cell, such as an ETOX (Eprom with Tunnel Oxide) cell uses a self-aligned double polysilicon (poly) structure as shown in FIG. 1 in which a substrate of semiconductor material 10 has been doped in the conventional way to form a source 11 and a drain 12. The semiconductor material 10 including the source 11 and drain 12 is coated with a tunnel oxide thin film 14. A gate structure 16 is formed on top of the tunnel oxide film 14. The first layer of the gate structure is a first polysilicon layer 18, referred to hereinafter as "poly 1" carrying an intermediate dielectric layer 19. An upper layer 25 comprises a second poly layer "poly 2."
A conventional flash memory cell has the disadvantage of critical thin dielectric in the form of a tunnel oxide for "F-N" (Fowler-Norheim) tunneling. The tunnel oxide must be thin (-100.ANG.) for F-N tunneling to provide erasing. Therefore, the reliability i.e., Q.sub.Bd (charge to breakdown) is a serious concern. Also, the thin tunnel oxide results in a poor coupling ratio for memory cell characteristics.